Engineers from the Massachusetts Institute of Technology; The University of Texas at Dallas; Sungkyunkwan University in Suwon-si, South Korea; and the Samsung Advanced Institute of Technology in Suwon, South Korea, have created a multilayered chip design that doesn’t require any silicon wafer substrates and works at temperatures low enough to preserve the underlying layer’s circuitry. The multilayered chip consists of alternating layers of two different transition metal dichalcogenides (a type of 2D material): molybdenum disulfide, a promising material candidate for fabricating n-type transistors; and tungsten diselenide, a material that has potential for being made into p-type transistors. Both p- and n-type transistors are the electronic building blocks for carrying out any logic operation. The method will double the density of a chip’s semiconducting elements, particularly metal-oxide semiconductor (CMOS), which is a basic building block of a modern logic circuitry.
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